Eyebrow Corner

 使用ADS讀取SnP檔案 1. 新建一個工作空間 2. 建立一個電路示意圖 3. 在Parts裡的Basic Components找到TermG以及SP，擺上圖面 4. 再從Data Items內找到S元件，擺上圖面 5. 雙擊SnP圖示，設定port數以及載入SnP檔路徑（這裡代入S2P檔，故設定port number = 2） 6. 點擊上方功能區的走線，將TermG以及SnP圖示連接起來。 7. 雙擊S-PARAMETERS以設定起始頻率、終止頻率及取樣間隔 8. 點擊上方模擬按鍵以進行模擬及偵錯 9. 在新跑出來的視窗中點擊左側的Palette，選取方形圖示，點選S（1,1）, 選擇單位，即可跑出想要看的S（1,1）參數 10. 跑出來的圖形如下： Use ADS to read SnP file 1. Create a new workspace 2. Create a schematic 3. Find TermG and SP in Basic Components from Parts and drag the icon to the blank space 4. Find the S component from Data Items and drag the icon to the proper position 5. Double-click the SnP icon, set the port number and the path to load the SnP file (Here load the S2P file, so set port number = 2) 6. Click on the wiring in the upper functional area to connect the TermG and SnP icons. 7. Double-click S-PARAMETERS to set the start frequency, stop frequency and sampling interval 8. Click the simulation button above to perform simulation and debugging 9. In the newly opened window, ...

Skin effect on signal integrity   As the signal transmission speed becomes higher and higher, the operating frequency becomes higher and higher, and the current tends to flow more and more on the surface. The relationship between the operating frequency and the skin depth is as follows: The following is a comparison table of frequencies and skin depths of copper commonly used in current high-speed products: In terms of PCB design, it is usually necessary to reduce the roughness of the copper surface due to signal integrity considerations. However, if the roughness is too low, the bonding force between copper and P.P. of the PCB will be insufficient, thus affecting its reliability. 趨膚效應對訊號完整性的影響 由於訊號傳輸時速度愈高，操作頻率就愈高，而電流就會愈趨向導體表面流動，其中操作頻率與趨膚深度的關係如下： 以下列舉一些目前高速產品常用的頻率與銅材質趨膚深度的對照表： 以PCB設計而言，通常因為訊號完整性考量需要降低銅表面的粗糙度，但是粗糙度太低也會造成PCB的銅與P.P.結合力不足，進而影響其可靠度。

談人工智慧晶片的4種類型 傳統伺服器與AI伺服器的差別在於： 1. 傳統伺服器透過CPU做為主要的運算， 2. AI伺服器除了使用CPU外，還使用GPU、FPGA、ASIC來加速運算。 一般來說，傳統伺服器價格較低，約1500~3000 美元；而AI伺服器價格較高，如AI推論伺服器落在3000~20000美元；而AI訓練伺服器約落在15~30萬美元。 以下簡介各種伺服器晶片的差別： 1. CPU (Central Processing Unit): 以執行複雜指令集為目的，處理重複性高的類神經運算。 2. GPU (Graphics Processing Unit): 擅長浮點數及平行運算，適用於AI深度學習。 3. FPGA (Field Programmable Gate Array): 可依需求調整硬體配置，具備演算法靈活性。 4. ASIC (Application Specific Integrated Circuit): 能針對特定應用最佳化算效能、降低功耗、縮小體積。 4 Types of AI Chip  The difference between traditional servers and AI servers is: 1. Traditional servers use the CPU as the main operations. 2. E xcept for the CPU,  AI ​​servers also use GPU, FPGA, and ASIC to accelerate operations. Generally speaking, the price of traditional servers is lower, about 1,500 to 3,000 USD; while the price of AI servers is higher, such as AI inference servers is about 3,000 to 20,000 USD; and AI training servers is about 150,000 to 300,000 USD.  The following is the introduction to the differences betw...

談玻纖編織效應如何影響訊號完整性 近年來，由於AI應用的發展，高速訊號差分走線的應用頻率愈來愈高，對於訊號完整性的要求也愈來愈大，因為走線不等長、參考層不對稱等因素造成的skew（訊號延遲）對誤碼率（Bit Error Rate）的影響也愈來愈大，本章即是探討由玻纖編織效應造成的訊號延遲所造成的影響及可能的解決方式。 由於skew造成的相位延遲 skew造成的Insertion Loss Insertion Loss的共振點可由上述公式算出，也就是說，共振頻率與玻纖、樹脂之介電常數（Dk）以及走線經過的玻纖長度有關。 以下列舉幾個常見的解決方法： 1. 差動對以Zig-Zag形式走在玻纖上。 2. 將玻纖與走線的相對角度旋轉7至10度。 3. 選用經向與緯向有相同玻紗數的玻纖布。 4. 選用與樹脂相近Dk的玻纖布。 Zig-Zag形式走線 How Fiber Weave Effect Affects Signal Integrity Recently, due to the development of AI applications, the application frequency of high-speed differential signals have become higher and higher, and the requirements for signal integrity have also increased. Due to skew caused by factors such as lengths mismatch of traces and asymmetry of the reference layers, it has the increasing impact on the bit error rate of the entire system. This chapter discusses the impact of signal delay caused by the fiberglass weave effect and the corresponding possible solutions. Phase delay due to skew Insertion Loss due to skew The resonan...